On Thu, Jan 12, 2017 at 08:34:26PM +0000, Chris Brandt wrote: > Hi Geert, > > On Thursday, January 12, 2017, Geert Uytterhoeven wrote: > > This is strange. There are two SDHI channels, but the STBCR12 > > documentation (all versions up to rev. 3.00) says the register has MSTP > > bits for four SD host interfaces? > > > > Can you please enlighten me? Thanks! > > Ya, I saw that. There are 2 bits per SDHI channel. I did check and just > enabling the one works fine. > > Honestly, I'm not sure why there are two clock enables. > > I'll go back and ask the design team if they can tell me why there are 2. > > As I said, I just re-tested and it works fine, but you can hold off on the > patch if you want until I come up with a real explanation. I'd prefer to hold off on this for now.
