Re: [PATCH] clk: renesas: mstp: Support 8-bit registers for r7s72100

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Hi Chris

> The RZ/A1 is different than the other Renesas SOCs because the MSTP
> registers are 8-bit instead of 32-bit and if you try writing values as
> 32-bit nothing happens...meaning this driver never worked for r7s72100.
> 
> Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi")
> Signed-off-by: Chris Brandt <chris.brandt@xxxxxxxxxxx>
> ---
(snip)
> +/**
> + * Some devices only have 8-bit registers
> + */
> +bool reg_width_8bit;
(snip)
> +static void __init cpg_mstp_clocks_init8(struct device_node *np)
> +{
> +	reg_width_8bit = true;
> +	cpg_mstp_clocks_init(np);
> +}
> +CLK_OF_DECLARE(cpg_mstp_clks8, "renesas,r7s72100-mstp-clocks",
> +	       cpg_mstp_clocks_init8);

I don't think using global variable is a good idea.
For example, how about add reg_width_8bit into mstp_clock_group,
and cpg_mstp_read/write requests it, or something like that ?

Best regards
---
Kuninori Morimoto



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