On Fri, Nov 25, 2016 at 10:55 AM, Ramesh Shanmugasundaram <ramesh.shanmugasundaram@xxxxxxxxxxxxxx> wrote: > Hello DT maintainers, > > In one of the Renesas SoCs we have a device called DRIF (Digital Radio Interface) controller. A DRIF channel contains 4 external pins - SCK, SYNC, Data pins D0 & D1. > > Internally a DRIF channel is made up of two SPI slave devices (also called sub-channels here) that share common CLK & SYNC signals but have their own resource set. The DRIF channel can have either one of the sub-channel active at a time or both. When both sub-channels are active, they need to be managed together as one device as they share same CLK & SYNC. We plan to tie these two sub-channels together with a new property called "renesas,bonding". Is there no need to describe the master device? No GPIOs, regulators or other sideband controls needed? If that's never needed (which seems doubtful), then I would do something different here probably with the master device as a child of one DRIF and then phandles to master from the other DRIFs. Otherwise, this looks fine to me. Rob
