Re: [PATCHv2 1/2] pinctrl: sh-pfc: r8a7796: Add drive strength support

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Hi Niklas,

On Tue, Nov 15, 2016 at 1:18 PM, Niklas Söderlund
<niklas.soderlund@xxxxxxxxxxxx> wrote:
>> > +       SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'),  7, DU_DOTCLKIN2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
>>
>> DU_DOTCLKIN3 is pin AR8.
>
> DU_DOTCLKIN2 is pin AR8, right?

Yes. Silly typo on my part, and copied and pasted to bring more confusion :-(

>> > +               { PIN_A_NUMBER('R', 8),  24, 2 },       /* DU_DOTCLKIN3 */
>>
>> Probably this is a bug in the datasheet, as M3-W does not have DU_DOTCLKIN3?
>
> No bug in the datasheet only me who is confused by the naming of the
> external leads and pins described above. Will fix this up and resend
> after your feedback, sorry for the confusion and thanks for spotting it.

The bit is labeled for H3 only in the PUEN register, but not in the
PUD register.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds




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