Hello. On 09/09/2016 06:52 PM, Chris Brandt wrote:
For the r7s72100 SOC, the DATA_PORT register was change to be 32-bits wide. Therefore a new flag has been created that will allow 32-bit reads/writes to the DATA_PORT register instead of 16-bit (because 16-bits accesses are not supported). Signed-off-by: Chris Brandt <chris.brandt@xxxxxxxxxxx>
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diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c index 017a4dc..c38542d 100644 --- a/drivers/mmc/host/tmio_mmc_pio.c +++ b/drivers/mmc/host/tmio_mmc_pio.c @@ -439,10 +439,45 @@ static void tmio_mmc_transfer_data(struct tmio_mmc_host *host, { int is_read = host->data->flags & MMC_DATA_READ; u8 *buf8; + u32 data; /* * Transfer the data */ + if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) { + if (is_read) + sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf, + count >> 2); + else + sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf, + count >> 2); + + /* if count was multiple of 4 */ + if (!(count & 0x3)) + return; + + buf8 = (u8 *)(buf + (count >> 2)); + count %= 4; + + if (is_read) { + sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1); + while (count--) { + *buf8 = data * 0xFF;
'data & 0xFF', perhaps?
+ data = data >> 8; + buf8++; + } + } else { + data = *buf8++; + if (count > 1) + data |= (*buf8++ << 8); + if (count > 2) + data |= (*buf8++ << 16); + sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1); + } + + return; + } + if (is_read) sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); else
MBR, Sergei