RE: [PATCH v2] clk: renesas: rz: Select EXTAL vs USB clock

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Hi Geert,

Thank you for the good review!


On Aug 30, 2016, Geert Uytterhoeven wrote:
> If you would use "cpg_mode = (ioread16(ppr0) >> 2) & 1;", the value of cpg_mode would
> be in sync with Table 6.2. Then you can avoid relying on actual clock names in DT, and
> keep
>
>    parent_name = of_clk_get_parent_name(np, cpg_mode);
>
> The bindings already dictate the parent clocks must match clock modes in the datasheet,
> i.e. Table 6.2.

Cool trick. I guess I don't get understand all the "DT Magic" yet.
I'll update the patch and resend.


> For easier maintenance, I would factor out reading the mode pins in a separate function.
> When a proper GPIO driver is added, the function can be removed, and its callsite updated.

OK. I see setup-rcar-gen2.c had a separate rcar_gen2_read_mode_pins() function.
Inside of clk-rz.c I'll make a rz_cpg_read_mode_pin() function.

Chris




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