On Fri, Jul 1, 2016 at 9:45 AM, Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > Hi Ulrich, > > On Wed, Jun 29, 2016 at 6:06 PM, Ulrich Hecht > <ulrich.hecht+renesas@xxxxxxxxx> wrote: >> Implements pull-up and pull-down. On this SoC there is no simple mapping of >> GP pins to bias register bits, so we need a table. > > Thanks for your patch! > > This covers bias for pins that can be used as a GPIO only, just like the > existing drive strength support, right? Right. > Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> Thank you! CU Uli
