Re: [PATCH v3 1/3] arm64: dts: r8a7796: Add Renesas R8A7796 SoC support

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Hi Dirk,

On Thu, May 26, 2016 at 9:32 AM, Dirk Behme <dirk.behme@xxxxxxxxxxxx> wrote:
> On 26.05.2016 09:03, Geert Uytterhoeven wrote:
>> On Wed, May 25, 2016 at 9:32 AM, Dirk Behme <dirk.behme@xxxxxxxxxxxx>
>> wrote:
>>> P.S.: This also results in the question why we need similar
>>> r8a7795-cpg-mssr.h and r8a7796-cpg-mssr.h with just different "numbers"
>>> for
>>> the same clocks. Can't we use the same numbers on all SoCs, with just
>>> having
>>> wholes in the list where the clocks don't exist on a SoC? I haven't
>>> looked
>>
>> The CPG and MSSR block are the IP blocks that differ most among SoCs of
>> the
>> same family. Some clocks are present on H3 only, others on M3-W only.
>
> Yes, this is my understanding as well. Is the H3 a superset? And the M3-W
> drops some clocks? Or are there really clocks which are on M3-W only and not
> on H3?

H3 is not a superset.
M3-W e.g. has more S0Dx clocks (for x = 2, 3, 6, 8, 12).

> this
>
> &scif2 {
>         clocks = <&cpg CPG_MOD 310>,
>                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
>                  <&scif_clk>;
> };
>
> &scif2 {
>         clocks = <&cpg CPG_MOD 310>,
>                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
>                  <&scif_clk>;
> };
>
> should be done better.

That's a bad example, as both SoCs use S3D1 ;-)

Now look at e.g. i2c:
  - On H3, the parent of the i2c module clock is S3D2,
  - On M3-W, the parent of the i2c module clock is S3D2 for i2c0/1/2,
    and S0D6 for i2c3/4/5/6.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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