Re: [RFC 3/4] clk: renesas: r8a7796: Add Z clock

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Hi Khiem,

On Tue, May 10, 2016 at 6:44 AM, Khiem Nguyen
<khiem.nguyen.xt@xxxxxxxxxxxxxxx> wrote:
> index c84b549..7368805 100644
> --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
> @@ -94,6 +94,8 @@ static const struct cpg_core_clk r8a7796_core_clks[]
> __initconst = {
>
>         DEF_FIXED("cl",         R8A7796_CLK_CL,    CLK_PLL1_DIV2, 48, 1),
>         DEF_FIXED("cp",         R8A7796_CLK_CP,    CLK_EXTAL,      2, 1),
> +
> +       DEF_BASE("z",           R8A7795_CLK_Z,   CLK_TYPE_GEN3_Z,   CLK_PLL0),

R8A7796_CLK_Z?

How could that work?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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