From: Dirk Behme <dirk.behme@xxxxxxxxx>
The boot mode register is a 32bit unsigned entity, the meaning of its values
are implementation dependent.
Signed-off-by: Dirk Behme <dirk.behme@xxxxxxxxx>
---
arch/arm/boot/dts/r8a7790.dtsi | 5 +++++
arch/arm/boot/dts/r8a7791.dtsi | 5 +++++
arch/arm/boot/dts/r8a7793.dtsi | 5 +++++
arch/arm/boot/dts/r8a7794.dtsi | 6 ++++++
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 5 +++++
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 5 +++++
6 files changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 83cf23c..3f775b0 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1102,6 +1102,11 @@
#power-domain-cells = <0>;
};
+ modemr: modemr@e6160060 {
+ compatible = "renesas,modemr";
+ reg = <0 0xe6160060 0 0x4>;
+ };
+
/* Variable factor clocks */
sd2_clk: sd2@e6150078 {
compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index db67e34..e1cd497 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -1122,6 +1122,11 @@
#power-domain-cells = <0>;
};
+ modemr: modemr@e6160060 {
+ compatible = "renesas,modemr";
+ reg = <0 0xe6160060 0 0x4>;
+ };
+
/* Variable factor clocks */
sd2_clk: sd2@e6150078 {
compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 1dd6d20..683f11d 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -933,6 +933,11 @@
#power-domain-cells = <0>;
};
+ modemr: modemr@e6160060 {
+ compatible = "renesas,modemr";
+ reg = <0 0xe6160060 0 0x4>;
+ };
+
/* Variable factor clocks */
sd2_clk: sd2@e6150078 {
compatible = "renesas,r8a7793-div6-clock",
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index f334a3a..f849306 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -932,6 +932,12 @@
"rcan";
#power-domain-cells = <0>;
};
+
+ modemr: modemr@e6160060 {
+ compatible = "renesas,modemr";
+ reg = <0 0xe6160060 0 0x4>;
+ };
+
/* Variable factor clocks */
sd2_clk: sd2@e6150078 {
compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 7181db0..2b957a8 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -309,6 +309,11 @@
#power-domain-cells = <0>;
};
+ modemr: modemr@e6160060 {
+ compatible = "renesas,modemr";
+ reg = <0 0xe6160060 0 0x4>;
+ };
+
sysc: system-controller@e6180000 {
compatible = "renesas,r8a7795-sysc";
reg = <0 0xe6180000 0 0x0400>;
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 1389528..4a9054c 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -109,6 +109,11 @@
#power-domain-cells = <0>;
};
+ modemr: modemr@e6160060 {
+ compatible = "renesas,modemr";
+ reg = <0 0xe6160060 0 0x4>;
+ };
+
sysc: system-controller@e6180000 {
compatible = "renesas,r8a7796-sysc";
reg = <0 0xe6180000 0 0x0400>;
--
2.8.0
