From: Simon Horman <horms+renesas@xxxxxxxxxxxx> Use new boot mode reg infrastructure to obtain the mode pin value for initialising clocks for for R-Car Gen2 SoCs. Signed-off-by: Simon Horman <horms+renesas@xxxxxxxxxxxx> --- arch/arm/mach-shmobile/setup-rcar-gen2.c | 3 +-- drivers/clk/renesas/clk-rcar-gen2.c | 12 ++++++++++-- include/linux/clk/renesas.h | 2 +- 3 files changed, 12 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index a45b05b..2af84d8 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -138,14 +138,13 @@ void __init rcar_gen2_timer_init_for_arch_timer(void) void __init rcar_gen2_timer_init(void) { int err; - u32 mode = rcar_gen2_read_mode_pins(); err = rcar_init_boot_mode(); if (err) pr_err("Could not initialise boot mode register driver\n"); rcar_gen2_timer_init_for_arch_timer(); - rcar_gen2_clocks_init(mode); + rcar_gen2_clocks_init(); clocksource_probe(); } diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c index 00e6aba..bd3fe93 100644 --- a/drivers/clk/renesas/clk-rcar-gen2.c +++ b/drivers/clk/renesas/clk-rcar-gen2.c @@ -20,6 +20,8 @@ #include <linux/slab.h> #include <linux/spinlock.h> +#include <misc/boot-mode-reg.h> + struct rcar_gen2_cpg { struct clk_onecell_data data; spinlock_t lock; @@ -421,9 +423,15 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np) CLK_OF_DECLARE(rcar_gen2_cpg_clks, "renesas,rcar-gen2-cpg-clocks", rcar_gen2_cpg_clocks_init); -void __init rcar_gen2_clocks_init(u32 mode) +void __init rcar_gen2_clocks_init(void) { - cpg_mode = mode; + int err; + + err = boot_mode_reg_get(&cpg_mode); + if (err) { + pr_err("%s: failed obtain boot mode\n", __func__); + return; + } of_clk_init(NULL); } diff --git a/include/linux/clk/renesas.h b/include/linux/clk/renesas.h index ba6fa41..d4a1518 100644 --- a/include/linux/clk/renesas.h +++ b/include/linux/clk/renesas.h @@ -22,7 +22,7 @@ struct generic_pm_domain; void r8a7778_clocks_init(u32 mode); void r8a7779_clocks_init(u32 mode); -void rcar_gen2_clocks_init(u32 mode); +void rcar_gen2_clocks_init(void); void cpg_mstp_add_clk_domain(struct device_node *np); #ifdef CONFIG_CLK_RENESAS_CPG_MSTP -- 2.8.0