Hi Peter,
On Fri, Mar 18, 2016 at 8:07 PM, Peter Hurley <peter@xxxxxxxxxxxxxxxxxx> wrote:
> On 03/17/2016 06:47 AM, Geert Uytterhoeven wrote:
>> Replace the custom SCIx_HAVE_RTSCTS flag in the
>> plat_sci_port.capabilities field by the standard UPF_HARD_FLOW flag in
>> the uart_port.flags and plat_sci_port.flags fields.
>> Remove the now unused plat_sci_port.capabilities field.
>> Legacy pllatform data can enable UPF_HARD_FLOW in plat_sci_port.flags.
>
> UPF_HARD_FLOW is really for indicating the h/w supports automatic
> CTS and RTS signalling; ie., RTS is automatically de-asserted when
> rx fifo reaches some threshold and CTS will automatically prevent
> tx fifo output.
>
> There is no serial core flag for indicating the h/w supports (or does not)
> RTS and/or CTS signalling.
Sorry for not being clearer: Renesas SCIF hardware with dedicated RTS/CTS pins
does have support for automatic RTS/CTS signalling. The driver has (unused)
support for that (cfr. setting the SCFCR_MCE (Modem Control Enable) flag), but
it seems to be busted when enabled.
If I understand it correctly:
1. Automatic RTS/CTS signalling should be enabled only if the user enabled it
through termios->c_cflag & CRTSCTS,
2. If the user didn't set CRTSCTS, the RTS output pin should be controlled by
the serial core, through .set_mctrl(),
3. Regardless of the user setting CRTSCTS or not, .get_mctrl() should report
the current status of the CTS input pin.
Are my assumptions correct?
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
