From: Kuninori Morimoto <kuninori.morimoto.gx@xxxxxxxxxxx> Gen2 / Gen3 datasheet will have below note in next version. This patch follows this note. IPSRx and MOD_SELx registers shall be set before setting GPSRx registers in case that they need to be configured. MOD_SELx registers can be set either earlier or later than setting IPSRx registers. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@xxxxxxxxxxx> --- drivers/pinctrl/sh-pfc/sh_pfc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h index 2b593fc..f174d61 100644 --- a/drivers/pinctrl/sh-pfc/sh_pfc.h +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h @@ -279,7 +279,7 @@ struct sh_pfc_soc_info { * - msel: Module selector */ #define PINMUX_IPSR_MSEL(ipsr, fn, msel) \ - PINMUX_DATA(fn##_MARK, FN_##msel, FN_##ipsr, FN_##fn) + PINMUX_DATA(fn##_MARK, FN_##msel, FN_##fn, FN_##ipsr) /* * Describe a pinmux configuration for a single-function pin with GPIO -- 1.9.1