On Tue, Jun 04, 2024 at 12:14:50PM -0500, Hari Nagalla wrote: > The C7xv-dsp on AM62A have 32KB L1 I-cache and a 64KB L1 D-cache. It > does not have an addressable l1dram . So, remove this optional sram > property from the bindings to fix device tree build warnings. > > Signed-off-by: Hari Nagalla <hnagalla@xxxxxx> > --- > Changes in v3: > *) Use allOf keyword with separate ifs for each variant instead > of nested if/else conditions. > > v2: https://lore.kernel.org/all/20240530164816.1051-1-hnagalla@xxxxxx/ > > .../bindings/remoteproc/ti,k3-dsp-rproc.yaml | 89 +++++++++++-------- > 1 file changed, 51 insertions(+), 38 deletions(-) > Applied Thanks, Mathieu > diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml > index 9768db8663eb..b51bb863d759 100644 > --- a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml > +++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml > @@ -25,9 +25,6 @@ description: | > host processor (Arm CorePac) to perform the device management of the remote > processor and to communicate with the remote processor. > > -allOf: > - - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# > - > properties: > compatible: > enum: > @@ -89,41 +86,57 @@ properties: > should be defined as per the generic bindings in, > Documentation/devicetree/bindings/sram/sram.yaml > > -if: > - properties: > - compatible: > - enum: > - - ti,j721e-c66-dsp > -then: > - properties: > - reg: > - items: > - - description: Address and Size of the L2 SRAM internal memory region > - - description: Address and Size of the L1 PRAM internal memory region > - - description: Address and Size of the L1 DRAM internal memory region > - reg-names: > - items: > - - const: l2sram > - - const: l1pram > - - const: l1dram > -else: > - if: > - properties: > - compatible: > - enum: > - - ti,am62a-c7xv-dsp > - - ti,j721e-c71-dsp > - - ti,j721s2-c71-dsp > - then: > - properties: > - reg: > - items: > - - description: Address and Size of the L2 SRAM internal memory region > - - description: Address and Size of the L1 DRAM internal memory region > - reg-names: > - items: > - - const: l2sram > - - const: l1dram > +allOf: > + - if: > + properties: > + compatible: > + enum: > + - ti,j721e-c66-dsp > + then: > + properties: > + reg: > + items: > + - description: Address and Size of the L2 SRAM internal memory region > + - description: Address and Size of the L1 PRAM internal memory region > + - description: Address and Size of the L1 DRAM internal memory region > + reg-names: > + items: > + - const: l2sram > + - const: l1pram > + - const: l1dram > + > + - if: > + properties: > + compatible: > + enum: > + - ti,j721e-c71-dsp > + - ti,j721s2-c71-dsp > + then: > + properties: > + reg: > + items: > + - description: Address and Size of the L2 SRAM internal memory region > + - description: Address and Size of the L1 DRAM internal memory region > + reg-names: > + items: > + - const: l2sram > + - const: l1dram > + > + - if: > + properties: > + compatible: > + enum: > + - ti,am62a-c7xv-dsp > + then: > + properties: > + reg: > + items: > + - description: Address and Size of the L2 SRAM internal memory region > + reg-names: > + items: > + - const: l2sram > + > + - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# > > required: > - compatible > -- > 2.34.1 >
