Re: [PATCH 12/13] mailbox: omap: Reverse FIFO busy check logic

[Hari Nagalla <hnagalla@xxxxxx>]

On 3/25/24 12:20, Andrew Davis wrote:
>   
>   static int omap_mbox_chan_send_noirq(struct omap_mbox *mbox, u32 msg)
>   {
> -	int ret = -EBUSY;
> +	if (mbox_fifo_full(mbox))
> +		return -EBUSY;
>   
> -	if (!mbox_fifo_full(mbox)) {
> -		omap_mbox_enable_irq(mbox, IRQ_RX);
> -		mbox_fifo_write(mbox, msg);
> -		ret = 0;
> -		omap_mbox_disable_irq(mbox, IRQ_RX);
> +	omap_mbox_enable_irq(mbox, IRQ_RX);
> +	mbox_fifo_write(mbox, msg);
> +	omap_mbox_disable_irq(mbox, IRQ_RX);
>   
> -		/* we must read and ack the interrupt directly from here */
> -		mbox_fifo_read(mbox);
> -		ack_mbox_irq(mbox, IRQ_RX);
> -	}
> +	/* we must read and ack the interrupt directly from here */
> +	mbox_fifo_read(mbox);
> +	ack_mbox_irq(mbox, IRQ_RX);
>   
> -	return ret;
> +	return 0;
>   }
Is n't the interrupt supposed to be IRQ_TX above? i.e TX ready signal?