[PATCH v3 1/2] dt-bindings: remoteproc: imx_rproc: Support i.MX8MN/P MMIO

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The MX8M CM7 boot via SMC call is problematic, since not all versions
of ATF support this interface. Document MMIO support used to boot the
CM7 on MX8MN/MP instead and discern MMIO interface using DT compatible
string. Document GPR register syscon phandle which is required by the
MMIO interface too.

Signed-off-by: Marek Vasut <marex@xxxxxxx>
Cc: Bjorn Andersson <andersson@xxxxxxxxxx>
Cc: Conor Dooley <conor+dt@xxxxxxxxxx>
Cc: Fabio Estevam <festevam@xxxxxxxxx>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>
Cc: Mathieu Poirier <mathieu.poirier@xxxxxxxxxx>
Cc: NXP Linux Team <linux-imx@xxxxxxx>
Cc: Peng Fan <peng.fan@xxxxxxx>
Cc: Pengutronix Kernel Team <kernel@xxxxxxxxxxxxxx>
Cc: Rob Herring <robh+dt@xxxxxxxxxx>
Cc: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
Cc: Shawn Guo <shawnguo@xxxxxxxxxx>
Cc: devicetree@xxxxxxxxxxxxxxx
Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
Cc: linux-remoteproc@xxxxxxxxxxxxxxx
V2: Rename 'gpr' to 'fsl,iomuxc-gpr'
V3: Rename 'gpr' to 'fsl,iomuxc-gpr' everywhere
Note that the MMIO being discerned using compatible string is similar
approach to "st,stm32mp1-rcc" vs "st,stm32mp1-rcc-secure".
 .../bindings/remoteproc/fsl,imx-rproc.yaml    | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
index 0c3910f152d1d..30632efdad8bb 100644
--- a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
@@ -20,7 +20,9 @@ properties:
       - fsl,imx7ulp-cm4
       - fsl,imx8mm-cm4
       - fsl,imx8mn-cm7
+      - fsl,imx8mn-cm7-mmio
       - fsl,imx8mp-cm7
+      - fsl,imx8mp-cm7-mmio
       - fsl,imx8mq-cm4
       - fsl,imx8qm-cm4
       - fsl,imx8qxp-cm4
@@ -70,6 +72,11 @@ properties:
       Specify CPU entry address for SCU enabled processor.
+  fsl,iomuxc-gpr:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit.
     $ref: /schemas/types.yaml#/definitions/uint32
@@ -79,6 +86,19 @@ properties:
   - compatible
+  - if:
+      properties:
+        compatible:
+          not:
+            contains:
+              enum:
+                - fsl,imx8mn-cm7-mmio
+                - fsl,imx8mp-cm7-mmio
+    then:
+      properties:
+        fsl,iomuxc-gpr: false
 additionalProperties: false

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