On 28/09/2022 11:17, TingHan Shen (沈廷翰) wrote: > On Wed, 2022-09-28 at 15:01 +0800, Peng Fan wrote: >> >> On 9/27/2022 10:55 AM, Tinghan Shen wrote: >>> The MT8195 SCP is a dual-core RISC-V MCU. Extend the yaml file >>> to describe the 2nd core as a subnode of the boot core. >>> >>> The configuration register is shared by MT8195 SCP core 0 >>> and core 1. The core 1 can retrieve the information of configuration >>> registers from parent node. >> >> I think the commit message would not convince people you put >> scp 1 as subnode of scp 0. >> >> Regards, >> Peng. >> > Hi Peng, > > Thanks for your review. I should give the most reasonable explanation > for why SCP 1 is a subnode. > > Adding SCP 1 as a subnode helps to assure finish probing SCP 1 > before starting SCP 0 by using of_platform_populate. It's because > that I want to probe SCP 1 as a remoteproc subdevice of SCP 0. > such that when SCP 0 crashed, SCP 0 can reboot SCP 1. As Peng noted, this is not proper description of hardware. The SCP 0/1 do not have parent-child relationship, so do not model it that way in Devicetree. Probe ordering is operating system specific, not related to bindings. Best regards, Krzysztof
