Quoting Rakesh Pillai (2021-03-09 23:28:09) > Add WPSS PIL loading support for SC7280 SoCs. > > Signed-off-by: Rakesh Pillai <pillair@xxxxxxxxxxxxxx> > --- > .../bindings/remoteproc/qcom,hexagon-v56.txt | 35 ++++++++++++---------- > 1 file changed, 20 insertions(+), 15 deletions(-) > > diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt b/Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt > index 1337a3d..edad5e8 100644 > --- a/Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt > +++ b/Documentation/devicetree/bindings/remoteproc/qcom,hexagon-v56.txt > @@ -9,6 +9,7 @@ on the Qualcomm Technology Inc. Hexagon v56 core. > Definition: must be one of: > "qcom,qcs404-cdsp-pil", > "qcom,sdm845-adsp-pil" > + "qcom,sc7280-wpss-pil" alphabet sort please. > > - reg: > Usage: required > @@ -24,7 +25,13 @@ on the Qualcomm Technology Inc. Hexagon v56 core. > - interrupt-names: > Usage: required > Value type: <stringlist> > - Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" > + Definition: The interrupts needed depends on the compatible string > + qcom,sdm845-adsp-pil: > + qcom,qcs404-cdsp-pil: > + must be "wdog", "fatal", "ready", "handover", "stop-ack" > + qcom,sc7280-wpss-pil: Alphabet sort too? > + must be "wdog", "fatal", "ready", "handover", "stop-ack" > + "shutdown-ack" > > - clocks: > Usage: required > @@ -35,19 +42,17 @@ on the Qualcomm Technology Inc. Hexagon v56 core. > - clock-names: > Usage: required for SDM845 ADSP > Value type: <stringlist> > - Definition: List of clock input name strings sorted in the same > - order as the clocks property. Definition must have > - "xo", "sway_cbcr", "lpass_ahbs_aon_cbcr", > - "lpass_ahbm_aon_cbcr", "qdsp6ss_xo", "qdsp6ss_sleep" > - and "qdsp6ss_core". > - > -- clock-names: > - Usage: required for QCS404 CDSP > - Value type: <stringlist> > - Definition: List of clock input name strings sorted in the same > - order as the clocks property. Definition must have > - "xo", "sway", "tbu", "bimc", "ahb_aon", "q6ss_slave", > - "q6ss_master", "q6_axim". > + Definition: The clocks needed depends on the compatible string > + qcom,sdm845-adsp-pil: > + must be "xo", "sway_cbcr", "lpass_ahbs_aon_cbcr", > + "lpass_ahbm_aon_cbcr", "qdsp6ss_xo", "qdsp6ss_sleep", > + "qdsp6ss_core" > + qcom,qcs404-cdsp-pil: > + must be "xo", "sway", "tbu", "bimc", "ahb_aon", "q6ss_slave", > + "q6ss_master", "q6_axim" > + qcom,sc7280-wpss-pil: Alphabet sort too? > + must be "gcc_wpss_ahb_bdg_mst_clk", "gcc_wpss_ahb_clk", > + "gcc_wpss_rscp_clk" > > - power-domains: > Usage: required > @@ -65,7 +70,7 @@ on the Qualcomm Technology Inc. Hexagon v56 core. > Definition: must be "pdc_sync" and "cc_lpass" > > - reset-names: > - Usage: required for QCS404 CDSP > + Usage: required for QCS404 CDSP, SC7280 WPSS > Value type: <stringlist> > Definition: must be "restart" > > -- > 2.7.4 >
