Hi Bjorn, On Thu, Mar 18, 2021 at 3:51 AM Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> wrote: > > On Tue 29 Dec 19:27 CST 2020, Martin Blumenstingl wrote: > > > Amlogic Meson6, Meson8, Meson8b and Meson8m2 embed an ARC core in the > > Always-On (AO) power-domain. This is typically used for waking up the > > ARM cores after system suspend. > > > > The configuration is spread across three different registers: > > - AO_REMAP_REG0 which must be programmed to zero, it's actual purpose > > is unknown. There is a second remap register which is not used in the > > vendor kernel (which served as reference for this driver). > > - AO_CPU_CNTL is used to start and stop the ARC core. > > - AO_SECURE_REG0 in the SECBUS2 register area with unknown purpose. > > > > To boot the ARC core we also need to enable it's gate clock and trigger > > a reset. > > > > The actual code for this ARC core can come from an ELF binary, for > > example by building the Zephyr RTOS for an ARC EM4 core and then taking > > "zephyr.elf" as firmware. This executable does not have any "rsc table" > > so we are skipping rproc_elf_load_rsc_table (rproc_ops.parse_fw) and > > rproc_elf_find_loaded_rsc_table (rproc_ops.find_loaded_rsc_table). > > > > Thanks for the patch Martin, it looks really good. Just some minor > things as I expect a respin of the DT binding as well. thank you for your comments. I will send an updated series in the next few days and include all of your suggested changes since I sent this series (it's been a few days) I also got an update from Amlogic so I know have better understanding of some (but unfortunately not all) registers so it'll be a bigger update. but don't worry: I'll include a changelog Best regards, Martin
