On Thu 10 Dec 11:09 CST 2020, Tzung-Bi Shih wrote:
> On Fri, Dec 11, 2020 at 1:02 AM Bjorn Andersson
> <bjorn.andersson@xxxxxxxxxx> wrote:
> >
> > On Wed 09 Dec 23:41 CST 2020, Tzung-Bi Shih wrote:
> >
> > > The correct MT8192 CFG register base is 0x20000 off. Changes the
> > > registers accordingly.
> > >
> > > Fixes: fd0b6c1ff85a ("remoteproc/mediatek: Add support for mt8192 SCP")
> > > Signed-off-by: Tzung-Bi Shih <tzungbi@xxxxxxxxxx>
> >
> > I presume there's an associated DT change with this?
> >
> > I'm okay with taking this, but would like to have Matthias ack on the
> > fact that we're breaking backwards compatibility with older DTS.
> >
> > (Or I could ack this and Matthias can take it together with the DT
> > change, to reduce the breakage gap in the git history?)
>
> Yes, it has associated DT changes. But the board "MT8192 SCP" is
> still under development, the DTS part hasn't been sent to upstream
> yet.
>
> Thus, it won't break anyone else.
Then I don't mind merging this, will include it in v5.11.
Thank you,
Bjorn
