On Thu, Aug 27, 2020 at 09:21:00AM +0200, Arnaud Pouliquen wrote:
> Add new properties description used to attach to a pre-loaded
> firmware according to the commit 9276536f455b3
> ("remoteproc: stm32: Parse syscon that will manage M4 synchronisation")
> which updates the driver part.
>
> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@xxxxxx>
> ---
> .../bindings/remoteproc/st,stm32-rproc.yaml | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml
> index 4ffa25268fcc..e50957d86b1c 100644
> --- a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml
> +++ b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml
> @@ -96,6 +96,25 @@ properties:
> 3rd cell: register bitmask for the deep sleep bit
> maxItems: 1
>
> + st,syscfg-m4-state:
> + $ref: "/schemas/types.yaml#/definitions/phandle-array"
> + description: |
> + Reference to the tamp register which exposes the Cortex-M4 state.
> + 1st cell: phandle to syscon block
> + 2nd cell: register offset containing the Cortex-M4 state
> + 3rd cell: register bitmask for the Cortex-M4 state
> + maxItems: 1
> +
> + st,syscfg-rsc-tbl:
> + $ref: "/schemas/types.yaml#/definitions/phandle-array"
> + description: |
> + Reference to the tamp register which references the Cortex-M4
> + resource table address.
> + 1st cell: phandle to syscon block
> + 2nd cell: register offset containing the resource table address
> + 3rd cell: register bitmask for the resource table address
> + maxItems: 1
Why can't these be implied? You can lookup the tamp syscon by
compatible.
Please add these to the example.
> +
> st,auto-boot:
> $ref: /schemas/types.yaml#/definitions/flag
> description:
> --
> 2.17.1
>
