On Thu, 2019-12-19 at 11:15 +0530, Sibi Sankar wrote:
> Add the out of reset sequence support for modem sub-system on SC7180
> SoCs. It requires access to an additional halt nav register to put
> the modem back into reset.
>
> Signed-off-by: Sibi Sankar <sibis@xxxxxxxxxxxxxx>
> ---
> drivers/remoteproc/qcom_q6v5_mss.c | 199 ++++++++++++++++++++++++++++-
> 1 file changed, 198 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
> index 164fc2a53ef11..51f451311f5fc 100644
> --- a/drivers/remoteproc/qcom_q6v5_mss.c
> +++ b/drivers/remoteproc/qcom_q6v5_mss.c
[...]
> @@ -396,6 +409,18 @@ static int q6v5_reset_assert(struct q6v5 *qproc)
> reset_control_assert(qproc->pdc_reset);
> ret = reset_control_reset(qproc->mss_restart);
> reset_control_deassert(qproc->pdc_reset);
> + } else if (qproc->has_halt_nav) {
> + /* SWAR using CONN_BOX_SPARE_0 for pipeline glitch issue */
> + reset_control_assert(qproc->pdc_reset);
> + regmap_update_bits(qproc->conn_map, qproc->conn_box,
> + BIT(0), BIT(0));
> + regmap_update_bits(qproc->halt_nav_map, qproc->halt_nav,
> + NAV_AXI_HALTREQ_BIT, 0);
> + reset_control_assert(qproc->mss_restart);
> + reset_control_deassert(qproc->pdc_reset);
> + regmap_update_bits(qproc->conn_map, qproc->conn_box,
> + BIT(0), 0);
> + ret = reset_control_deassert(qproc->mss_restart);
> } else {
> ret = reset_control_assert(qproc->mss_restart);
> }
Without knowing anything about the hardware this does look a bit weird,
but I assume there is a good reason for every step.
Is the function name still describing its behaviour correctly, or would
it make sense to rename q6v5_reset_assert/deassert to something else?
[...]
> @@ -667,6 +742,39 @@ static void q6v5proc_halt_axi_port(struct q6v5 *qproc,
> regmap_write(halt_map, offset + AXI_HALTREQ_REG, 0);
> }
>
> +static void q6v5proc_halt_nav_axi_port(struct q6v5 *qproc,
> + struct regmap *halt_map,
> + u32 offset)
> +{
[...]
> + /* Wait for halt ack*/
> + timeout = jiffies + msecs_to_jiffies(HALT_ACK_TIMEOUT_MS);
> + for (;;) {
> + ret = regmap_read(halt_map, offset, &val);
> + if (ret || (val & NAV_AXI_HALTACK_BIT) ||
> + time_after(jiffies, timeout))
> + break;
> +
> + udelay(5);
> + }
This does look like a candidate for using regmap_read_poll_timeout().
regards
Philipp
