Add devicetree binding for the Q6SSTOP clock controller found in QCS404. Signed-off-by: Govind Singh <govinds@xxxxxxxxxxxxxx> --- .../bindings/clock/qcom,q6sstopcc.yaml | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml b/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml new file mode 100644 index 000000000000..861e9ba97ca3 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,osm-l3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Q6SSTOP clock Controller + +maintainers: + - Govind Singh <govinds@xxxxxxxxxxxxxx> + +description: + Q6SSTOP clock controller is used by WCSS remoteproc driver + to bring WDSP out of reset. + +properties: + compatible: + const: "qcom,qcs404-q6sstopcc" + + reg: + maxItems: 2 + description: Q6SSTOP clocks register region + description: Q6SSTOP_TCSR register region + + clocks: + items: + - description: ahb clock for the q6sstopCC + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +examples: + - | + q6sstopcc: clock-controller@7500000 { + compatible = "qcom,qcs404-q6sstopcc"; + reg = <0x07500000 0x4e000>, <0x07550000 0x10000>; + clocks = <&gcc GCC_WCSS_Q6_AHB_CLK>; + #clock-cells = <1>; + }; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
