On Wed, Jan 27, 2021 at 09:57:02PM -0600, Tatyana Nikolova wrote:
> +/**
> + * irdma_qp_post_wr - ring doorbell
> + * @qp: hw qp ptr
> + */
> +void irdma_qp_post_wr(struct irdma_qp_uk *qp)
> +{
> + __u64 temp;
> + __u32 hw_sq_tail;
> + __u32 sw_sq_head;
> +
> + /* valid bit is written and loads completed before reading shadow */
> + atomic_thread_fence(memory_order_seq_cst);
atomics are only used for synchronization with CPU threads, if this is
synchronizing DMA it needs to be one of the udma operations
Jason
