On Thu, Jan 21, 2021 at 12:59:55PM -0800, Samudrala, Sridhar wrote: > > + mlx5_core.sf.4 > > + (subfunction auxiliary device) > > + /\ > > + / \ > > + / \ > > + / \ > > + / \ > > + mlx5_core.eth.4 mlx5_core.rdma.4 > > + (sf eth aux dev) (sf rdma aux dev) > > + | | > > + | | > > + p0sf88 mlx5_0 > > + (sf netdev) (sf rdma device) > > This picture seems to indicate that when SF is activated, a sub > function auxiliary device is created Yes > and when a driver is bound to that sub function aux device and > probed, 2 additional auxiliary devices are created. More than two, but yes > Is this correct? Are all these auxiliary devices seen on the same > aux bus? Yes > Why do we need another sf eth aux device? The first aux device represents the physical HW and mlx5_core binds to it, the analog is like a pci_device. The other aux devices represent the subsystem split of the mlx5 driver - mlx5_core creates them and each subsystem in turn binds to the mlx5_core driver. This already exists, and Intel will be doing this as well whenever the RDMA driver is posted again.. Jason
