On Thu, Jan 07, 2021 at 04:36:29PM +0800, Weihang Li wrote: > From: Yangyang Li <liyangyang20@xxxxxxxxxx> > > In order to improve performance by balancing the load between different > banks of cache, the CQC cache is desigend to choose one of 4 banks > according to lower 2 bits of CQN. The hns driver needs to count the number > of CQ on each bank and then assigns the CQ being created to the bank with > the minimum load first. > > Signed-off-by: Yangyang Li <liyangyang20@xxxxxxxxxx> > Signed-off-by: Weihang Li <liweihang@xxxxxxxxxx> > --- > Changes since v1: > - Change GFP_ATOMIC to GFP_KERNEL as there is a chance of memory allocation > failure, and change the spin lock to mutex lock because ida_alloc_range() > may sleep. > - Link: https://patchwork.kernel.org/project/linux-rdma/patch/1609742115-47270-1-git-send-email-liweihang@xxxxxxxxxx/ > > drivers/infiniband/hw/hns/hns_roce_cq.c | 115 +++++++++++++++++++++++----- > drivers/infiniband/hw/hns/hns_roce_device.h | 10 ++- > drivers/infiniband/hw/hns/hns_roce_main.c | 8 +- > 3 files changed, 105 insertions(+), 28 deletions(-) Applied to for-next, thanks Jason
