On Fri, 8 Nov 2019 22:39:52 +0100, Jiri Pirko wrote: > >> Please let me understand how your device is different. > >> Originally Parav didn't want to have mlx5 subfunctions as mdev. He > >> wanted to have them tight to the same pci device as the pf. No > >> difference from what you describe you want. However while we thought > >> about how to fit things in, how to handle na phys_port_name, how to see > >> things in sysfs we came up with an idea of a dedicated bus. > > > >The difference is that there is naturally a main device and subslices > >with this new mlx5 code. In mlx4 or nfp all ports are equal and > >statically allocated when FW initializes based on port breakout. > > Ah, I see. I was missing the static part in nfp. Now I understand. It is > just an another "pf", but not real pf in the pci terminology, right? Ack, due to (real and perceived) HW limitations what should have been separate PFs got squished into a single big one. Biggest NFP chip has an insane (for a NIC) number Ethernet ports.
