On Thu, Jun 20, 2019 at 04:33:53PM -0300, Jason Gunthorpe wrote: > > My primary concern with this is that ascribes a level of generality > > that just isn't there for peer-to-peer dma operations. "Peer" > > addresses are not "DMA" addresses, and the rules about what can and > > can't do peer-DMA are not generically known to the block layer. > > ?? The P2P infrastructure produces a DMA bus address for the > initiating device that is is absolutely a DMA address. There is some > intermediate CPU centric representation, but after mapping it is the > same as any other DMA bus address. > > The map function can tell if the device pair combination can do p2p or > not. At the PCIe level there is no such thing as a DMA address, it all is bus address with MMIO and DMA in the same address space (without that P2P would have not chance of actually working obviously). But that bus address space is different per "bus" (which would be an root port in PCIe), and we need to be careful about that.
