On Wed, Apr 24, 2019 at 04:40:54PM +0000, Saeed Mahameed wrote: > On Wed, 2019-04-24 at 10:07 -0300, Jason Gunthorpe wrote: > > On Sun, Mar 31, 2019 at 07:44:42PM +0300, Leon Romanovsky wrote: > > > From: Leon Romanovsky <leonro@xxxxxxxxxxxx> > > > > > > > From Ariel, > > > > > > This series of patches adds user space managed steering > > > infrastructure > > > to the mlx5_ib driver. > > > > > > User space managed steering requires the means to access a > > > dedicated > > > memory space that is used by the device to store the packet > > > steering > > > and header modification tables and rules in order to manage them > > > directly > > > without the device's firmware involvement. This dedicated memory is > > > part > > > of the ICM memory space. > > > > > > The changes are introducing the mlx5_ib API to allocate, deallocate > > > and > > > register this dedicated SW ICM memory via the existing device > > > memory API > > > using a private attribute which specifies the memory type. > > > > > > The allocated memory itself is not IO mapped and user can only > > > access it > > > using remote RDMA operations. > > > > > > In addition, the series exposed the ICM address of the receive > > > transport > > > interface (TIR) of Raw Packet and RSS QPs to user since they are > > > required > > > to properly create and insert steering rules that direct flows to > > > these QPs. > > > > > > Thanks > > > > > > Ariel Levkovich (8): > > > net/mlx5: Expose SW ICM related device memory capabilities > > > IB/mlx5: Support device memory type attribute > > > IB/mlx5: Warn on allocated MEMIC buffers during cleanup > > > IB/mlx5: Add steering SW ICM device memory type > > > IB/mlx5: Device resource control for privileged DEVX user > > > > This doesn't apply, it conflicts with patches in mlx5-next, please > > resent > > > > > net/mlx5: Expose TIR ICM address in command outbox > > > net/mlx5: Introduce new TIR creation core API > > > IB/mlx5: Expose TIR ICM address to user space > > > > it is a 3 patch series: > net/mlx5: Expose TIR ICM address in command outbox > net/mlx5: Introduce new TIR creation core API > net/mlx5: Expose SW ICM related device memory capabilities > > LGTM, I can apply them if you want, or do you want to wait for leon ? Fine by me Jason
