On 2018/9/7 2:43, Jason Gunthorpe wrote:
> On Thu, Sep 06, 2018 at 04:49:58PM +0800, Yixian Liu wrote:
>> @@ -251,6 +252,14 @@ struct hns_roce_rc_sq_wqe {
>>
>> #define RC_SQ_WQE_BYTE_4_INLINE_S 12
>>
>> +#define RC_SQ_WQE_BYTE_4_MW_TYPE_S 14
>> +
>> +#define RC_SQ_WQE_BYTE_4_ATOMIC_S 20
>> +
>> +#define RC_SQ_WQE_BYTE_4_RDMA_READ_S 21
>> +
>> +#define RC_SQ_WQE_BYTE_4_RDMA_WRITE_S 22
>> +
>
> No extra horizontal space please
Ok, will fix it next version.
>
>> #define RC_SQ_WQE_BYTE_16_XRC_SRQN_S 0
>> #define RC_SQ_WQE_BYTE_16_XRC_SRQN_M \
>> (((1UL << 24) - 1) << RC_SQ_WQE_BYTE_16_XRC_SRQN_S)
>> @@ -275,4 +284,7 @@ struct hns_roce_v2_wqe_raddr_seg {
>> __le64 raddr;
>> };
>>
>> +int hns_roce_u_v2_post_send(struct ibv_qp *ibvqp, struct ibv_send_wr *wr,
>> + struct ibv_send_wr **bad_wr);
>> +
>> #endif /* _HNS_ROCE_U_HW_V2_H */
>> diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
>> index 5a5e767..943eea5 100644
>> +++ b/providers/hns/hns_roce_u_verbs.c
>> @@ -175,6 +175,32 @@ int hns_roce_u_dereg_mr(struct verbs_mr *vmr)
>> return ret;
>> }
>>
>> +int hns_roce_u_bind_mw(struct ibv_qp *qp, struct ibv_mw *mw,
>> + struct ibv_mw_bind *mw_bind)
>> +{
>> + struct ibv_send_wr *bad_wr = NULL;
>> + struct ibv_send_wr wr = { };
>
> No space in {}
Ok
>
>> + int ret;
>> +
>> + wr.opcode = IBV_WR_BIND_MW;
>> + wr.next = NULL;
>> +
>> + wr.wr_id = mw_bind->wr_id;
>> + wr.send_flags = mw_bind->send_flags;
>> +
>> + wr.bind_mw.mw = mw;
>> + wr.bind_mw.rkey = ibv_inc_rkey(mw->rkey);
>> + wr.bind_mw.bind_info = mw_bind->bind_info;
>> +
>> + ret = hns_roce_u_v2_post_send(qp, &wr, &bad_wr);
>> + if (ret)
>> + return ret;
>> +
>> + mw->rkey = wr.bind_mw.rkey;
>> +
>> + return 0;
>> +}
>
> This is exactly the same as mlx4_bind_mw.. We shouldn't have
> duplicates..
>
> It is also missing all the correctness checking that is in
> mlx5_bind_mw
>
> Jason
>
Yes, as bind mw is a simple interface it looks very similar for different
vendors. I will add some checking in next version according to IB protocol.
