On 5/11/2018 4:24 PM, Stephen Bates wrote:
All
Alex (or anyone else) can you point to where IOVA addresses are generated?
A case of RTFM perhaps (though a pointer to the code would still be appreciated).
https://www.kernel.org/doc/Documentation/Intel-IOMMU.txt
Some exceptions to IOVA
-----------------------
Interrupt ranges are not address translated, (0xfee00000 - 0xfeefffff).
The same is true for peer to peer transactions. Hence we reserve the
address from PCI MMIO ranges so they are not allocated for IOVA addresses.
Hmm, except I'm not sure how to interpret that. It sounds like there
can't be an IOVA address that overlaps with the PCI MMIO range which is
good and what I'd expect.
But for peer to peer they say they don't translate the address which
implies to me that the intention is for a peer to peer address to not be
mapped in the same way using the dma_map interface (of course though if
you were using ATS you'd want this for sure). Unless the existing
dma_map command's notice a PCI MMIO address and handle them differently,
but I don't see how.
Logan
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