Hi Frederick, Thank you for the patch! Yet something to improve: [auto build test ERROR on linus/master] [also build test ERROR on v4.16 next-20180406] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Frederick-Lawler/IB-hfi1-Cleanup-PCIe-link-configuration/20180409-072005 config: x86_64-allmodconfig (attached as .config) compiler: gcc-7 (Debian 7.3.0-1) 7.3.0 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): drivers/infiniband/hw/hfi1/pcie.c: In function 'do_pcie_gen3_transition': >> drivers/infiniband/hw/hfi1/pcie.c:1043:19: error: 'PCI_EXP_LINKSTA_CLS_2_5GB' undeclared (first use in this function); did you mean 'PCI_EXP_LNKSTA_CLS_2_5GB'? target_vector = PCI_EXP_LINKSTA_CLS_2_5GB; ^~~~~~~~~~~~~~~~~~~~~~~~~ PCI_EXP_LNKSTA_CLS_2_5GB drivers/infiniband/hw/hfi1/pcie.c:1043:19: note: each undeclared identifier is reported only once for each function it appears in >> drivers/infiniband/hw/hfi1/pcie.c:1046:19: error: 'PCI_EXP_LINKSTA_CLS_5_0GB' undeclared (first use in this function); did you mean 'PCI_EXP_LNKSTA_CLS_5_0GB'? target_vector = PCI_EXP_LINKSTA_CLS_5_0GB; ^~~~~~~~~~~~~~~~~~~~~~~~~ PCI_EXP_LNKSTA_CLS_5_0GB >> drivers/infiniband/hw/hfi1/pcie.c:1049:19: error: 'PCI_EXP_LINKSTA_CLS_8_0GB' undeclared (first use in this function); did you mean 'PCI_EXP_LINKSTA_CLS_5_0GB'? target_vector = PCI_EXP_LINKSTA_CLS_8_0GB; ^~~~~~~~~~~~~~~~~~~~~~~~~ PCI_EXP_LINKSTA_CLS_5_0GB >> drivers/infiniband/hw/hfi1/pcie.c:1288:17: error: 'PCI_EXP_LINKSTA_CLS' undeclared (first use in this function); did you mean 'PCI_EXP_LNKSTA_CLS'? if ((lnkctl2 & PCI_EXP_LINKSTA_CLS) < target_vector) { ^~~~~~~~~~~~~~~~~~~ PCI_EXP_LNKSTA_CLS vim +1043 drivers/infiniband/hw/hfi1/pcie.c 1014 1015 /* 1016 * Do all the steps needed to transition the PCIe link to Gen3 speed. 1017 */ 1018 int do_pcie_gen3_transition(struct hfi1_devdata *dd) 1019 { 1020 struct pci_dev *parent = dd->pcidev->bus->self; 1021 u64 fw_ctrl; 1022 u64 reg, therm; 1023 u32 reg32, fs, lf; 1024 u32 status, err; 1025 int ret; 1026 int do_retry, retry_count = 0; 1027 int intnum = 0; 1028 uint default_pset; 1029 uint pset = pcie_pset; 1030 u16 target_vector, target_speed; 1031 u16 lnkctl2, vendor; 1032 u8 div; 1033 const u8 (*eq)[3]; 1034 const u8 (*ctle_tunings)[4]; 1035 uint static_ctle_mode; 1036 int return_error = 0; 1037 1038 /* PCIe Gen3 is for the ASIC only */ 1039 if (dd->icode != ICODE_RTL_SILICON) 1040 return 0; 1041 1042 if (pcie_target == 1) { /* target Gen1 */ > 1043 target_vector = PCI_EXP_LINKSTA_CLS_2_5GB; 1044 target_speed = 2500; 1045 } else if (pcie_target == 2) { /* target Gen2 */ > 1046 target_vector = PCI_EXP_LINKSTA_CLS_5_0GB; 1047 target_speed = 5000; 1048 } else if (pcie_target == 3) { /* target Gen3 */ > 1049 target_vector = PCI_EXP_LINKSTA_CLS_8_0GB; --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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