On Tue, Mar 27, 2018 at 10:20:02PM +1100, Benjamin Herrenschmidt wrote: > On Tue, 2018-03-27 at 10:42 +0100, Will Deacon wrote: > > > > > > This example adds a wmb() between two writes to a coherent DMA > > > area, it is definitely required there. I'm pretty sure I've never seen > > > any bug reports pointing to a missing wmb() between memory > > > and MMIO write accesses, but if you remember seeing them in the > > > list, maybe you can look again for some evidence of something going > > > wrong on x86 without it? > > > > If this is just about ordering accesses to coherent DMA, then using > > dma_wmb() instead will be much better performance on arm/arm64. > > Ah, something we should look into for powerpc as well, as we could use > an lwsync for that which is also cheaper than a full sync wmb does. > > dma_wmb() is basically the same as smp_wmb() without the CONFIG_SMP > conditional right ? Almost -- the slight change we have on arm64 is to say that it's "outer-shareable", which means it also orders non-cacheable accesses in the case that dma_alloc_coherent is used to allocate a consistent buffer for a non-coherent device. Will -- To unsubscribe from this list: send the line "unsubscribe linux-rdma" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
