On 3/26/2018 9:43 AM, Arnd Bergmann wrote: > On Wed, Mar 21, 2018 at 2:58 PM, Sinan Kaya <okaya@xxxxxxxxxxxxxx> wrote: >> On 3/21/2018 8:53 AM, Sinan Kaya wrote: >>> BTW, I have no idea what compiler barrier does on PPC and if >>> >>> wrltel() == compiler barrier() + wrltel_relaxed() >>> >>> can be said. >> >> this should have been >> >> writel_relaxed() == compiler barrier() + __raw_writel() > > I don't think anyone clarified this so far, but there are additional differences > between the two, writel_relaxed() assumes we are talking to a 32-bit > little-endian > MMIO register, while __raw_writel() is primarily used for writing into > memory-type > regions with no particular byte order. This means: > > - writel_relaxed() must perform a byte swap when running on big-endian kernels > - when used with __packed MMIO pointers, __raw_writel() may turn into a series > of byte writes, while writel_relaxed() must result in a single 32-bit access. > - A set if consecutive writel_relaxed() on the same device is issued in program > order, while __raw_writel() is not ordered. This typically requires > only a compiler > barrier, but may also need a CPU barrier (in addition to the > barriers we use to > serialize with spinlocks and DMA in writel() but not writel_relaxed()). Thanks for the great summary. I didn't know that __raw_writel() could get converted to byte writes. > > Arnd > -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project. -- To unsubscribe from this list: send the line "unsubscribe linux-rdma" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
