Re: What is synchronizing MMIO-writes on a shared UAR?

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On Mon, Mar 12, 2018 at 2:37 PM, Jason Gunthorpe <jgg@xxxxxxxx> wrote:
> On Sun, Mar 11, 2018 at 08:07:43PM -0500, Rohit Zambre wrote:
>
>> the different bfregs. However, the Mellanox PRM states that doorbells
>> to the same UAR page must be serialized.
>
> This seems like a nonsense statement to me. doorbell rings are
> indivisible 64 bit writes, there is no concept of serialization of
> those writes to a PCI-E device.

In the "Sharing UARs" section, the PRM states "No other DoorBell can
be rung (or even start ringing) in the midst of an on-going write of a
DoorBell over a given UAR page... the access to a UAR must be
synchronized unless an atomic write of 64 bits in a single bus
operation is guaranteed." What is the implication of this statement
and is this implemented?

>> Here is the doorbell ringing code from MOFED-4.1
>>
>>     case MLX5_DB_METHOD_DEDIC_BF:
>>         /* The QP has dedicated blue-flame */
>
> But blue flame writes are 8 64 bit bytes and have to be serialized to
> work properly.

What case are you referring to over here for serialization: the case
of multiple blue flame writes to the same bfreg by multiple threads?
Or the case of multiple blue flame writes to different bfregs on the
same UAR by multiple threads?

> Jason

Thanks,
Rohit
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