On 11/13/2017 10:24 PM, Alex Rosenbaum wrote:
On Mon, Nov 13, 2017 at 10:05 PM, Jason Gunthorpe <jgg@xxxxxxxx> wrote:
On Sun, Nov 12, 2017 at 11:41:43PM +0200, Yishai Hadas wrote:
I thought the plan was to have API entry points under mlx5dv to
access and set the UAR on the TD? Is that still the case?
It is not needed for now. the UAR index maps nicely to the td object.
Correct, see patch #3 around TD creation which maps UAR to a TD. (i.e
mlx5_attach_dedicated_bf()). Application will not control which UAR
index will be used but will control the option to share same UAR between
QPs by using same TD object upon QP creation.
the uar index hint was needed for cases where there are very few uar's
in the HW to allocate for potential too many threads.
we will expose the MAX uar's available for a context via DV API.
Correct, this will give the application an hint what is the max
ibv_td(s) that can be created as each of is mapped to a dedicated UAR
under the cover. As this is some mlx5 specification implementation
detail it will be exposed by the DV API.
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