On 2/28/2017 7:06 PM, Jason Gunthorpe wrote:
Okay, my mistake, then it must be this, which increases the leading barrier to a wc_wmb().. See the discussion with Ram:
diff --git a/providers/mlx5/cq.c b/providers/mlx5/cq.c index cc0af920c703d9..1ce2cf2dd0bbd4 100644 --- a/providers/mlx5/cq.c +++ b/providers/mlx5/cq.c @@ -1281,16 +1281,16 @@ int mlx5_arm_cq(struct ibv_cq *ibvcq, int solicited) /* * Make sure that the doorbell record in host memory is - * written before ringing the doorbell via PCI MMIO. + * written before ringing the doorbell via PCI WC MMIO. */ - udma_to_device_barrier(); + mmio_wc_start(); doorbell[0] = htonl(sn << 28 | cmd | ci); doorbell[1] = htonl(cq->cqn); mlx5_write64(doorbell, ctx->uar[0] + MLX5_CQ_DOORBELL, &ctx->lock32); - mmio_ordered_writes_hack(); + mmio_flush_writes(); return 0; }
The above seems fine, can you please send a formal patch to fix the original series, thanks.
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