> I think there are some fundamental questions here about what this is. > As I understand it (and Mellanox can chime in if I'm wrong), tag > matching already exists on the wire, it's just implemented above the > level of the link layer transmissions. This enables a hardware > accelerator for something that is already done at an upper layer, so > the > implementation is mostly defined by the defacto existing use in upper > layer applications, not by the IBTA. I believe this could roughly be MPIs definitely make use of this sort of protocol, but it is an application level protocol that is non-standard, even between MPI implementations. There's no interoperability between them. The Intel truescale and OPA implementations support tag matching, with HW offload support, but those too are proprietary (i.e. PSM). In the case of PSM, I believe the tag matching is part of the transport protocol. There's a decent chance the Mellanox implementation is the same. > considered analogous to a network driver enabling a layer3 or layer4 > accelerator. It's not a layer1 thing, so the IBTA is not appropriate > to > review it. The IBTA defines layer1-4, plus the verbs interfaces. So, it _could_ be an IBTA issue. However, the IBTA allows for vendor specific features (e.g. PSM), so it could be a vendor feature. IMO, this is a feature worth supporting. My concern is over how it is exposed. There's a lot of variety in how tag matching can be implemented. - Sean -- To unsubscribe from this list: send the line "unsubscribe linux-rdma" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
