Re: [PATCH 0/5] Indirect memory registration feature

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On 6/8/2015 4:22 PM, Christoph Hellwig wrote:
On Mon, Jun 08, 2015 at 04:15:34PM +0300, Sagi Grimberg wrote:
There are couple of possible (sub-optimal) solutions to handle this limitation:

There is another one:  Set the block level SG_GAPS flags to ensure
the block layer never generates these SG lists.


Hi Christoph,

I have learned about QUEUE_FLAG_SG_GAPS from your recent comments on
the list. Won't setting this flag interfere with bio merges? Ideally
I wouldn't want to restrict merges if my device supports this feature.

Right now drivers tat set these would always fail SG_IO ioctls using
iovecs, but that can be fixed much more easily by doing high level
bounce buffering compared to these horrible workarounds deep down in the
stack.


My tests have shown significant cpu savings with this against SW bounce
buffering, especially for large transfers. I've seen applications that
a significant part of their IO workload consists of this type of memory
layout.

I must say that I've always considered SW bounce buffering as a
work-around for an RDMA driver.
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