Today, if one would like to run both features using a capable device
then
the PI will be offloaded (no SW fallback) and the Encryption will be
using
SW fallback.
It's not just running both - it's offering both as currently registering
these fatures is mutally incompatible.
For sure we would like to offer both, but as mentioned before, this will
require blk layer instrumentation and ib_core instrumentation to some
pipeline_mr or something like that.
Can you explain what is needed in the block layer that prevents queueing
a request that has PI and crypto ctx?
As for the rdma portion, I don't know enough if this is something
that is supported by the HW and lacks a SW interface, or inherently
unsupported in HW...
