On Wed, Jun 16, 2021 at 09:55:45AM +0000, liweihang wrote:
> If there is still any issues in this process, could you please tell us where to
> add the barrier? Thank you :)
I don't know ARM perfectly well, but generally look at
1) Do these special stores barrier with the spin unlock protecting
the post send? Allowing them to leak out will get things out of
order
2) ARM MMIO stores are not ordered, so that DB store the ST4 store
are not guaranteed to execute in program order without a barrier.
The spinlock is not a MMIO barrier
You could ignore some of this when the DB rings were basically
idempotent, but if you are xfering data it is more tricky. This is why
we always see a barrier after a WC store to put all future MMIO
strongly in order with the store.
Jason
