On Wed, Jun 09, 2021 at 02:05:03PM +0300, Leon Romanovsky wrote: > From: Avihai Horon <avihaih@xxxxxxxxxx> > > Relaxed Ordering is a capability that can only benefit users that support > it. All kernel ULPs should support Relaxed Ordering, as they are designed > to read data only after observing the CQE and use the DMA API correctly. > > Hence, implicitly enable Relaxed Ordering by default for kernel ULPs. > > Signed-off-by: Avihai Horon <avihaih@xxxxxxxxxx> > Signed-off-by: Leon Romanovsky <leonro@xxxxxxxxxx> > --- > Changelog: > v2: > * Dropped IB/core patch and set RO implicitly in mlx5 exactly like in > eth side of mlx5 driver. This looks great in terms of code changes. But can we please also add a patch to document that PCIe relaxed ordering is fine for kernel ULP usage somewhere?
