On 2021/3/12 21:20, Jason Gunthorpe wrote: > On Fri, Mar 12, 2021 at 05:38:53PM +0800, Weihang Li wrote: >> From: Lang Cheng <chenglang@xxxxxxxxxx> >> >> When reloading driver, the head/tail pointer of CMDQ may be not at position >> 0. Then during initialization of CMDQ, if head is reset first, the firmware >> will start to handle CMDQ because the head is not equal to the tail. The >> driver can reset tail first since the firmware will be triggerred only by >> head. This bug is introduced by changing macros of head/tail register >> without changing the order of initialization. >> >> Besides, the same name represents opposite meanings in new/old driver, it >> is hard to maintain, so rename them to PI/CI. > > Please split this to two patches for the -rc flow > >> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c >> index c3934ab..c359f09 100644 >> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c >> @@ -1194,8 +1194,10 @@ static void hns_roce_cmq_init_regs(struct hns_roce_dev *hr_dev, bool ring_type) >> upper_32_bits(dma)); >> roce_write(hr_dev, ROCEE_TX_CMQ_DEPTH_REG, >> (u32)ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S); >> - roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, 0); >> - roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, 0); >> + >> + /* Make sure to write CI first and then PI */ >> + roce_write(hr_dev, ROCEE_TX_CMQ_CI_REG, 0); >> + roce_write(hr_dev, ROCEE_TX_CMQ_PI_REG, 0); > > Only this hunk should be in -rc > > Thanks, > Jason > I see, thank you. Weihang
