On Thursday, 26 of June 2008, Alan Stern wrote:
> On Wed, 25 Jun 2008, Rafael J. Wysocki wrote:
>
> > Index: linux-2.6/drivers/pci/pci.c
> > ===================================================================
> > --- linux-2.6.orig/drivers/pci/pci.c
> > +++ linux-2.6/drivers/pci/pci.c
>
> > +/**
> > + * pci_pme_active - enable or disable PCI device's PME# function
> > + * @dev: PCI device to handle.
> > + * @pm: PCI PM capability offset of the device.
> > + * @enable: 'true' to enable PME# generation; 'false' to disable it.
> > + *
> > + * The caller must verify that the device is capable of generating PME# before
> > + * calling this function with @enable equal to 'true'.
> > + */
> > +static void pci_pme_active(struct pci_dev *dev, int pm, bool enable)
> > +{
> > + u16 pmcsr;
> > +
> > + if (!pm)
> > + return;
> > +
> > + pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr);
> > + /* Clear PME_Status by writing 1 to it and enable PME# */
> > + pmcsr |= PCI_PM_CTRL_PME_STATUS | PCI_PM_CTRL_PME_ENABLE;
> > + if (!enable)
> > + pmcsr &= ~PCI_PM_CTRL_PME_ENABLE;
> > +
> > + pci_write_config_word(dev, pm + PCI_PM_CTRL, pmcsr);
> > +}
>
> Question: Does the PME Status ever get cleared at any other times?
Currently, PME# status is only cleared when executing pci_pme_active() (for
example via pci_enable_wake()).
> For instance, suppose a PCI device does use PME# to wake up the system.
> Does its status get cleared?
If the driver of the device executes pci_enable_wake(dev, PCI_D0, false) during
resume, then the PME# status will be cleared.
Do you think the core should clear PME# status automatically in that case?
> Or suppose a PCI device is runtime-suspended and it generates a wakeup
> request? This will turn on PME# at a time when the system isn't asleep
> -- what happens then? Does it get lost somewhere in the bowels of
> ACPI?
Currently, yes, AFAICS.
> Does the PCI core need new code to handle such things?
Well, I thought of adding such things like the clearing of PME# status to the
PCI bus type suspend/resume callbacks.
Apart from this, I think that to implement PCI runtime PM we'll need to add
some new code. First of all, we need to handle the case when some devices are
in low power states before suspend/hibernation. Second, we need to handle PME#
generated by devices being in low power states (or even in D0) at run time and
that will certainly require new code.
Thanks,
Rafael
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