Pierre Ossman <drzeus-list@xxxxxxxxx> writes: > Many devices today are of a less than stellar quality, and singing > transistors are a common problem. A high-pitch noise is created, caused > by power fluctuations as the processor enters and leaves deep sleep at > a high frequency. > > Instead of just disabling the deep sleep (which wastes power). This > patch merely reduces the number of times it is entered so that the > frequency doesn't exceed 500 Hz. That should make sure the problem is > inaudible. > > Signed-off-by: Pierre Ossman <drzeus@xxxxxxxxx> > -- > > The basic idea is above, but the implementation doesn't quite work. It seems jiffies is not a good time source in this scenario. The time spent in C3 takes a much bigger hit than I expect. The fact that powertop says that it has an average residency of 200 ms in C2 tells me that those should have been spent in C3. I like the patch in principle, although I think the threshold should be configurable, not hard coded. I haven't checked in detail if that is the case, but you need to make sure that you only reference jiffies on idle exit after the clock source has caught up with lost jiffies after idle. That might be the cause of your problem. -Andi _______________________________________________ linux-pm mailing list linux-pm@xxxxxxxxxxxxxxxxxxxxxxxxxx https://lists.linux-foundation.org/mailman/listinfo/linux-pm
