* Todd Poynor <tpoynor@xxxxxxxxxx> wrote: > +static int > +powerop_centrino_get_point(struct powerop_point *point) > +{ > + unsigned l, h; > + unsigned cpu_freq; > + > + rdmsr(MSR_IA32_PERF_STATUS, l, h); > + if (unlikely((cpu_freq = ((l >> 8) & 0xff) * 100) == 0)) { > + /* > + * On some CPUs, we can see transient MSR values (which are > + * not present in _PSS), while CPU is doing some automatic > + * P-state transition (like TM2). Get the last freq set > + * in PERF_CTL. > + */ > + rdmsr(MSR_IA32_PERF_CTL, l, h); > + cpu_freq = ((l >> 8) & 0xff) * 100; > + } > + > + point->param[POWEROP_CPU + smp_processor_id()] = cpu_freq; > + point->param[POWEROP_V + smp_processor_id()] = ((l & 0xff) * 16) + 700; > + return 0; > +} doesnt seem to be SMP-safe, nor PREEMPT-safe. You probably want to do the locking in the highlevel functions. Ingo