On Mon, 24 Aug 2020 15:30:22 -0400, Jim Quinlan wrote: > From: Jim Quinlan <jquinlan@xxxxxxxxxxxx> > > Older BrcmSTB chips do not have a separate register for MSI interrupts; the > MSIs are in a register that also contains unrelated interrupts. In > addition, the interrupts lie in bits [31..24] for these legacy chips. This > commit provides common code for both legacy and non-legacy MSI interrupt > registers. > > Signed-off-by: Jim Quinlan <jquinlan@xxxxxxxxxxxx> > Acked-by: Florian Fainelli <f.fainelli@xxxxxxxxx> > --- > drivers/pci/controller/pcie-brcmstb.c | 71 +++++++++++++++++++-------- > 1 file changed, 50 insertions(+), 21 deletions(-) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
