On Fri, Sep 04, 2020 at 12:56:13PM +0200, Thierry Reding wrote:
> +static void tegra_msi_irq_mask(struct irq_data *d)
> +{
> + struct tegra_msi *msi = irq_data_get_irq_chip_data(d);
> + struct tegra_pcie *pcie = msi_to_pcie(msi);
> + unsigned int index = d->hwirq / 32;
> + u32 value;
> +
> + value = afi_readl(pcie, AFI_MSI_EN_VEC(index));
> + value &= ~BIT(d->hwirq % 32);
> + afi_writel(pcie, value, AFI_MSI_EN_VEC(index));
> +}
Do these need a flushing write? The Mask operation should be synchronous?
Thanks,
Jason
