On Wed, Aug 19, 2020 at 04:06:25PM +0300, Mika Westerberg wrote:
> Sec 7.5.3.6 requires such Ports to support DLL Link Active reporting, but
> at least the Intel JHL6240 Thunderbolt 3 Bridge [8086:15c0] and the Intel
> JHL7540 Thunderbolt 3 Bridge [8086:15ea] do not.
[...]
> + * Also do the same for devices that have power management disabled
> + * by their driver and are completely power managed through the
> + * root port power resource instead. This is a special case for
> + * nouveau.
> */
> - if (!pci_is_pcie(dev)) {
> + if (!pci_is_pcie(dev) || !child->pm_cap) {
It sounds like the above-mentioned Thunderbolt controllers are broken,
not the Nvidia cards, so to me (as an outside observer) it would seem
more logical that a quirk for the former is needed. The code comment
suggests that nouveau somehow has a problem, but that doesn't seem to
be the case (IIUC). Also, it's a little ugly to have references to
specific drivers in PCI core code.
Maybe this can be fixed with quirks for the Thunderbolt controllers
which set a flag, and that flag causes the 1000 msec wait to be skipped?
Thanks,
Lukas
