Hello Bharat Kumar Gogada,
The patch 0189e6fb2c46: "PCI: xilinx-cpm: Add Versal CPM Root Port
driver" from Jun 16, 2020, leads to the following static checker
warning:
drivers/pci/controller/pcie-xilinx-cpm.c:557 xilinx_cpm_pcie_probe()
error: uninitialized symbol 'bus_range'.
drivers/pci/controller/pcie-xilinx-cpm.c
537 static int xilinx_cpm_pcie_probe(struct platform_device *pdev)
538 {
539 struct xilinx_cpm_pcie_port *port;
540 struct device *dev = &pdev->dev;
541 struct pci_host_bridge *bridge;
542 struct resource *bus_range;
^^^^^^^^^^^^^^^^^^^^^^^^^^
543 int err;
544
545 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*port));
546 if (!bridge)
547 return -ENODEV;
548
549 port = pci_host_bridge_priv(bridge);
550
551 port->dev = dev;
552
553 err = xilinx_cpm_pcie_init_irq_domain(port);
554 if (err)
555 return err;
556
557 err = xilinx_cpm_pcie_parse_dt(port, bus_range);
^^^^^^^^^
Never initialized.
558 if (err) {
559 dev_err(dev, "Parsing DT failed\n");
560 goto err_parse_dt;
561 }
562
563 xilinx_cpm_pcie_init_port(port);
564
565 err = xilinx_cpm_setup_irq(port);
566 if (err) {
567 dev_err(dev, "Failed to set up interrupts\n");
568 goto err_setup_irq;
569 }
570
571 bridge->dev.parent = dev;
regards,
dan carpenter
